| PCI Express: |
- Designed for compliance with PCI Express.
- Multiple virtual channel (VC0,VC1 ) support fordiffe-rentiating
1394 isochronous traffic.
- Supports eight user-programmable traffic classes.
- 64-bit and 32-bit platform support.
- Interrupts via legacy INTx interface or message sig-naled interrupt
(MSI).
- Supports PCI Express clock power management viaCLKREQN signal
for form factors that support thisprotocol.
- Supports all linkpowermanagement states (L0,L0s,L1,andL2/L3)
and active state power management(ASPM).
- Supports wake-up from a low-power state via in-bandbeacon signaling
and side-band WAKE_N signal.
|
| OHCI (Open Host Controller Interface) |
- Enhanced with the OHCI 1.2 draft specification for 1394b-2002
PHY full operational compliance.
- OHCI 1.0 backwards compatible. Configurable via EEPROM to operate
in either OHCI 1.0 or OHCI 1.1 mode.
- 8 Kbyte isochronous transmit FIFO.
- 4 Kbyte asynchronous transmit FIFO.
- 8 Kbyte isochronous receive FIFO.
- 8 Kbyte asynchronous receive FIFO.
- Dedicated asynchronous and isochronous descriptor-based DMA
engines.
- Eight isochronous transmit contexts.
- Eight isochronous receive contexts.
- Supports parallel processing of incoming physical read and write
requests.
- Supports up to 48-bit addressing per OHCI specifica-tion for
the physical DMA transfers.
|
| 1394b-2002 Link |
- Cycle master and isochronous resource manager capable.
- Supports 1394a-2000 and 1394b-2002 acceleration features.
|
| 1394b-2002 PHY |
|
| Number of Ports: |
- Bilingual P1394b Cable Ports
|
| DC Power Connector: |
- Walkman-type 1.3 mm DC Jack
|
